Cadmium telluride (CdTe) is a semiconductor material that has been used in both its crystalline and (thin-film) polycrystalline forms for optoelectronic applications. CdTe is highly effective at converting terrestrial sunlight into electrical power by virtue of its bandgap energy of about 1.5 eV at room temperature. In addition, CdTe is transparent to infrared light ranging in wavelength from about 860 nm to greater than about 20 μm. As a result, very thin layers of CdTe of about 1 μm thickness may be incorporated into the construction of efficient photovoltaic (PV) devices. CdTe thin-film PV modules are widely recognized as an attractive option for large-scale renewable electricity production.
Commercial-scale CdTe solar cell fabrication processes presently deposit and cure polycrystalline CdTe using substantially similar processes. Historically, at least several process enhancements have been incorporated into these commercial-scale polycrystalline CdTe production methods to mitigate performance shortcomings of the deposited polycrystalline CdTe layer related to various material defects. These process enhancements may include: adding or not actively eliminating oxygen during CdTe deposition; performing a CdCl2 and/or oxygen “activation” process to the deposited CdTe layer; and diffusing Cu into the deposited CdTe layer from the back contact.
Although these process enhancements may reduce the detrimental effect of material defects such as Te vacancy defects (VTe), other deep-donor and deep-acceptor defects may be formed that may limit minority carrier lifetime (τ) within the CdTe layer. Because these τ-limiting deep donor and deep-acceptor defects are relatively stable, it may be challenging to lengthen the carrier minority lifetime of polycrystalline CdTe material beyond those of existing materials produced using current production methods.
Although many commercially-available CdTe PV modules provide average conversion efficiency of about 12%-13% at a relatively low production cost, the bandgap value of CdTe predicts that even higher conversion efficiencies may be achieved. Most ongoing efforts to enhance device performance above the record device efficiency of 17% involve device design improvements that aim to mitigate materials-based shortcomings of the CdTe absorber layer and the n-p junction. The quality of the n-p junction, typically assessed in terms of Voc, the open circuit voltage of the device, is thought to be one key to realizing higher-performing CdTe PV modules. Efforts to enhance Voc generally entail increasing the net acceptor concentration in the CdTe layer and the inclusion of an intrinsic CdTe layer situated between the n and p layers of the junction of the solar cell.
Increasing the net acceptor doping in CdTe has been considered as one means of increasing Voc. Elevated Voc for PV devices may occur when the net-donor (ND) and net-acceptor (NA) densities are increased on the n and p side of the semiconductor junction, respectively. Without being limited to any particular theory, it is believed that NA may be increased from typical thin-film values of about mid-1013 cm−3 to values of about 1015 cm−3 before self-compensation limits further increases in NA. Cu diffused into the CdTe layer from the back contact of a superstrate device design has been found to enhance the performance of CdS/CdTe cells in one approach. Although this “excessive” Cu diffusion into the CdTe layer may increase NA above that typically used for existing CdS/CdTe devices, a concurrent increase in device performance may not be observed because the Cu may also diffuse into the CdS layer, which may reduce net donor densities (ND). In addition, this increase in NA may narrow the depletion width (WD) in the device so that it becomes situated shallower in the device than the optical-absorption depth. Further, because minority-carrier lifetime for electrons in polycrystalline CdTe is relatively short (≦2 ns), the diffusion length for minority carriers generated outside WD may be too short to provide effective collection, further impacting device performance. Because the WD reduces even further in forward bias, the device fill factor (FF) may decrease due to voltage-dependant collection, which may offset any performance improvement from higher Voc. Thus, increasing Voc solely by increasing NA may not improve device performance unless τ of the p-CdTe layer is also increased.
An alternative method considered to increase Voc may be to incorporate an intrinsic layer of CdTe (i-CdTe) between the thin n and p layers of the junction, resulting in an n-i-p device design. Although the τ of thin-film p-CdTe may be on the order of about 1-2 ns, the τ of thin-film i-CdTe produced using existing methods may be less than about 0.1 ns. Therefore, photogenerated carriers in the i-CdTe may recombine before the electric field can drift them to their respective n- or p-type layer for collection. Thus, increasing Voc by using an n-i-p device design may not produce higher device performance unless the τ in the i-CdTe is also increased.
Ongoing efforts to enhance the Voc in existing CdTe PV modules may be limited by the relatively short minority carrier lifetime τ in the polycrystalline p-CdTe and i-CdTe materials produced using existing methods. The minority carrier lifetime in crystalline CdTe may be significantly longer than that observed in existing polycrystalline CdTe thin films, indicating that the short τ associated with polycrystalline CdTe produced using current methods may not be an intrinsic material property of CdTe, but more likely may be due to defects related to the nature of the thin-film polycrystalline material and/or production process conditions. Considering both the benefits and detriments of existing CdTe production and post-deposition enhancement processes, it may be beneficial to develop novel processes to produce a polycrystalline CdTe film with fewer vacancy defects such as VTe or VCd, which may simultaneously increase Voc and minority carrier lifetime, rather than reducing the detrimental effects of these defects using existing production methods which reduce minority carrier lifetime.
Therefore, there is a need for an improvement of the processes used to deposit polycrystalline CdTe absorber material on a substrate which simultaneously increases Voc and minority carrier lifetime and which results in improved CdTe device performance. The foregoing examples of the related art and limitations related therewith are intended to be illustrative and not exclusive. Other limitations of the related art will become apparent to those of skill in the art upon a reading of the specification and a study of the drawings.